The present invention relates to a semiconductor device and a manufacturing technology thereof, particularly to a semiconductor device having a nonvolatile memory such as EEPROM (Electrically Erasable Programmable Read Only Memory) or a flash memory and a technology effective when applied to its manufacturing method.
For example, a semiconductor integrated circuit device having a third gate, which has a function different from that of a floating gate and a control gate, buried in a space between floating gates existing in a direction vertical or parallel to a word line (control gate) and channel, and a manufacturing method of the device are described in Japanese Unexamined Patent Publication No. 2001-28428.
In Japanese Unexamined Patent Publication No. 2004-152977, described is a semiconductor memory device having an assist gate electrode at a position which is between source and drain regions formed in parallel to each other and is parallel to these regions but does not overlap therewith, using the assist electrode as an assist electrode for source-side hot electron injection during writing and an inversion layer formed below the assist electrode as the source or drain region during reading.